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International Journal of Metallurgical & Materials Engineering Volume 1 (2015), Article ID 1:IJMME-116, 9 pages
http://dx.doi.org/10.15344/2455-2372/2015/116
Research Article
Electrical Resistance Evolution of Cu Redistribution Layer Electroplated on a Si Interposer

Wan-Gyu Lee

Department of Nano CMOS, National NanoFab Center, Daejeon, 305-806, South Korea
Dr. Wan-Gyu Lee, Department of Nano CMOS, National NanoFab Center, Daejeon, 305-806, South Korea; E-mail: wangyulee@nnfc.re.kr
11 July 2015; 13 October 2015; 15 October 2015
Lee WG (2015) Electrical Resistance Evolution of Cu Redistribution Layer Electroplated on a Si Interposer. Int J Metall Mater Eng 1: 116. doi: http://dx.doi.org/10.15344/2455-2372/2015/116

Abstract

The changes in electrical and microstructural properties of electroplated Cu films on a Si-interposer substrate were investigated. When Cu films were exposed in an air environment after electroplating on SiO2/Si-substrate as a Si interposer, the resistance increased slightly until 7 days with a uniform distribution of it, and then increased very rapidly after 19 days with broader resistance distribution than those of the initial 7 days. It took 129 days to have much broader resistance distribution than that of 19 days. Secondary ion mass spectroscopy, X-ray photoelectron spectroscopy, and thin film X-ray diffraction demonstrated that the increase in electrical resistance of electroplated Cu films can be significantly influenced by the chlorine redistribution of impurity in electroplated Cu film to the surface of it, by the oxidation behavior on the surface of electroplated Cu film in an air environment, and the microstructural changes of electroplated Cu film with time, respectively. These phenomena can be explained by the ionic neutrality behavior due to the oxidation on the surface of electroplated Cu film and the microstructural changes with time at room temperature caused by recrystallization of electroplated Cu film. This study will be helpful in understanding the necessity of passivating or encapsulating the electroplated Cu film and will also give guidance to the 3-D integration of stacking many chips on a Si interposer.